Browser compatibility warning: CircuitLab may not work as expected in your web browser. Please see our System Requirements.

Flat line when Skip Initial is set to Yes.

Hello, First, Good Job on this website! It will prove to be very useful!

Issue: I created a simple RC circuit ().

When simulating this circuit using the Time Domain simulation method, if I set the "Skip Initial" option to No, the output voltage at Node 2 (V-Cap) is a flat line at the V1 voltage. If I change the "Skip Initial" setting to "No", I see the expected curve.

Am I unclear on the meaning of the Skip Initial feature, or is this a bug?

Thank you!

Ryan

by ryan
March 04, 2012

Ryan, V1 is a DC voltage source, so it is assumed that its value is constatnt for all t (from t = -infinity to t = +infinity). Transient analysis starts at t=0, so the initial voltage across C1 must be equal to V1. That's why when you turn on the initial conditions calculation, the program comes up with a constatnt 1V voltage. When the initial conditions calculation is turned off, the initial (i.e. at t=0) voltage across C1 is assumed to be zero and the program calculates the response as if V1 was a unit step pulse of 1V amplitude. Hope it helps. Cheers, Ben.

by Benek
March 06, 2012

Post a Reply

Please sign in or create an account to comment.

Go Ad-Free. Activate your CircuitLab membership. No more ads. Save unlimited circuits. Run unlimited simulations.

About CircuitLab

CircuitLab is an in-browser schematic capture and circuit simulation software tool to help you rapidly design and analyze analog and digital electronics systems.