OK, let’s first skip the lower part (everything behind node “Stage2”) to speed up simulation: It “works” here (Safari) in 15” (but the circuit is suboptimal in some points). Now I add OA16, simulation “works” but takes 65”. This stage itself is not working (“rectifying”). Now I add OA15, simulation takes 280” and shows what you have posted (um, how did you post the graph ?).
Take care: What you see in your simulation is not the truth because of your “ideal” power supply in TDS:
Regards, Sancho |
by Sancho_P
January 01, 2013 |
Hi Sancho, For me the most confusing part is the difference in behavior depending on whether I model with OpAmp+Power Rails, or OpAmp w/o Power Rails. "(um, how did you post the graph?)" I exported the images as PNG files, copied them to a web server I have access to, and linked with [img] command. Great if you have some place to post the files ... it'd be nice if the CL forum had some way of embedding images, though. -Kevin |
by khauser
January 01, 2013 |
Oh, I thought you knew how to place them in CL, thanks. Again, I think the rails are not the problem in your simulation (but maybe will be in your real application), the issue is the "bug" with the fully loaded capacitors at time = 0. Check your circuit again before going to the rectifier (do you need it?) also with frequency limits (low / high), depending on your ADC interval. Regards, Sancho |
by Sancho_P
January 01, 2013 |
Happy New Year folks, Kevin, In: https://www.circuitlab.com/circuit/c69896/ You have grounded the non-inv i/p of OA16. That should go to the +2.5V bias rail at the centre tap of R8 & R9. Also, you must not fit R33. The fullwave recitifier must be driven from a very low source resistance (the o/p of OA14) and see a very high load resistance (the non-inv i/p of OA15). Here's how the circuit works. The fullwave rectifier has some design rules: R30 = 2*R31 R32 = R31 For +ve half cycles D9 conducts and makes the inv i/p of OA16 sit at +2.5V. D10 is reverse biased. This makes the load on OA14 o/p look like This simplifies to:
The output at Rectified is:
which simplifies to:
For -ve half cycles, D9 is reverse biased and D10 conducts. The open loop gain of OA16 removes the diode drop by setting the o/p of OA16 such that the inv i/p of OA16 sits at +2.5V (that's what is meant by a virtual earth input, even though it's not at 0V it sits at a fixed voltage irrespective of other conditions). This means that OA16 operates as an inverting x0.5 gain stage where:
which simplifies to:
Under these conditions, the load at Stage2 is which simplifies to:
The reference circuit for the fullwave rectifer in my earlier postings on your original Arduino based circuit is: https://www.circuitlab.com/circuit/8x7xws/precision-full-wave-rectifier-01/ For a fixed input amplitude, if you see any mismatch between the successive rectified peak amplitudes at V(Rectified) then that is because the startup transient has not yet settled out. You need to run the sim for several times the time constant set by the input coupling cap and the input resistance (1uF*10kR) to allow that to settle out then look at the last few cycles. It is not easy to do that in CL because you have to wait for the whole sim to run then zoom into the last few ms of the whole plot. Unlike in more advanced spice simulators, you cannot run the sim for some time, T, but just plot the traces for T-t where t < T. Also, the circuit you have drawn around OA15 does not work correctly as a peak detector. For inputs above +2.5V, D2 is reverse biased so OA14 just goes open loop and behaves like a comparator. Hence V(Peak will always end up near the +ve supply rail! For inputs below +2.5V, D2 conducts and OA14 o/p follows V(Rectified). Please see my earlier postings on your Arduino based circuit and the reference circuit: https://www.circuitlab.com/circuit/vjt2qn/precision-active-peak-detector-02/ Too much festive input from Uncle Jack Daniels and not enough water? :) |
by signality
January 02, 2013 |
."(um, how did you post the graph?)" FYI, for a way to post screenshots, see under Bug reports in: https://www.circuitlab.com/forums/support/topic/8s9n9hav/how-to-use-the-circuitlab-support-forum/ |
by signality
January 02, 2013 |
Kevin, I should have thought a bit more about where to put the detailed description first anyway. I've just added an edited description in with the reference circuit. So, no, don't delete the old circuits. Glad it's working via whatever route! :) |
by signality
January 02, 2013 |
Just for kicks I went and added descriptions to most of my visible diagrams. That might help... BTW, the directions in Bug Reports are identical to what I've done, except I used my own storage space instead of a 3rd party. |
by khauser
January 02, 2013 |
Gotcha. |
by signality
January 02, 2013 |
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