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This schematic should explain loading a capacitor, but the result in the time domain is completely unexpected.

It might be correct in theory - I don’t know about, but for a newbie it’s unbelievable.

Even if the cap would be loaded at startup, why the curve in the plot?

No warning regarding bad initial conditions?

Do you think it’s correct?

Even more strange, if you set a timed switch before Cap1 (Like in Cap2) it works, but if you set 1 timed switch to 0.01s and the other one to 0.005s they both end up equally charged, even tho they receive the same voltage during different periods of time.

How can the capacitor charge double as fast as the first when receiving the same amount of energy?

@Sancho_P,

Unless you have edited the circuit since your posting or the guys at CL have tinkered with the solver, your circuit does exactly what you'd expect.

Assume that:

i) V1 is an ideal voltage source: zero source resistance, no parasitic inductance or capacitance.

ii) SW1 is an ideal switch : infinite OFF resistance, zero ON resistance, no parasitic inductance or capacitance.

iii) the voltage across C2, V(C2) =0V at T < 0.

With SW1 open, V(Supp) = V(C1) = 1V and V(Supp_SW) = 0V and V(C2) = 0V.

SW1 closes at T = 0, V(Supp) is unchanged and therefore, V(C1) is also unchanged at 1V, V(Supp_SW) rises to 1V instantaneously (limited in the plot only by the Time step) and V(C2) rises exponentially towards 1V.

Given the assumptions above, the simulation does exactly what is described above.

The Y axis of the plots of V(Supp) and V(C1) looks a bit strange only because appears to be showing a voltage deviating around 1V with a deviation of zero. This is common behaviour for simulators where a calculated voltage has no other reference in the plot pane. It is just the simulator and plotting algorithms saying these calculated voltages are constant.

Strange to see but that's just the way it is.

@Jesuso,

It is not clear from your description quite exactly what your circuit is.

However these two circuits:

both behave exactly the way they should given the same assumptions as for Sancho's circuit.

(Note however, that although the behaviour of these circuits in CL is what you would expect if you built real circuits, the same simulation in a SPICE simulator would give confusingly different results because switches in SPICE have a finite ON resistance. Unless a finite parallel leakage resistance is assigned to the capacitors, V(C1) and V(C2) will already have been charged to 1V at T = 0. This is because SPICE assumes that conditions at T < 0 have existed for an infinite time.

To produce the same results as seen in CL, parallel leakage resistances would have to be placed across C1 and C2 and the ON resistance of the switches would have to be 100x or more greater than these leakage resistances.

If you place such resistances in parallel with the switches (say 10G Ohms to 100G Ohms) and capacitors (say 1G Ohms) in CL, you will see the same effects as in SPICE.)

@Signality:

Um, sorry, I don’t understand what you mean. Are you kidding? ;-)

I didn’t change the circuit. The graph clearly shows two (CL) bugs in the first plot:

At T=0 we could discuss if the ideal source should be on or off (I’d vote for off in real world), but without any doubt Cap1 has to be at load == zero, thus at 0V.

This is the only possible starting condition for a capacitor if there is no “preload” (initial value) parameter. I do not miss such a parameter because my breadboard hasn’t any.

There is NO time before zero (in our real world).

• Thus the first plot has to show the loading of Cap1, as the second plot does with the Cap2, what we see is a bug.

For the Y - axis, to have several markers and lines with the same value is absurd. The graphical engine must throw a warning and must not display any marker / line on the Y - axis. To have the marker “1.000” twice is not possible in our real world.

• However, to show “calculated dots” (the word “calculated” is a joke here) connected by a thin line in a diagram where the whole Y - axis has the very same value is a bug.

OK, thanks for the hint that others do the same, but CL should not be the 23rd copycat of bogus programs. Progress, please.

@Jesuso: Sorry, I don’t understand your concern either, given the voltage source of 1V both caps will load until 1V - that’s what you’d expect, isn’t it?

Regards, Sancho

"At T=0 we could discuss if the ideal source should be on or off (I’d vote for off in real world), but without any doubt Cap1 has to be at load == zero, thus at 0V."

Absolutely not.

Sorry Sancho but you confuse the time for the start of the simulation (T=0 on the x axis of the plots) with the beginning of Time (i.e. the instant of the Big Bang).

The circuit clearly shows that a 1V source, V1, is permanently connected to R1 and C1. This is true irrespective of when the simulation starts and when SW1 closes.

It is not unreasonable then to assume that this state has persisted long enough for the circuit to have reached a stable state prior to the start of the simulation i.e. during T < 0.

So what you are seeing is what happens to a circuit that already has V1 connected to R1 and so has already charged C1 before SW1 closes.

There is nothing in the circuit that mandates that V(V1) = 0 for T < 0.

In the real world this time, T < 0, is the time from when you connected your battery or connected and switched on your bench supply and then connected up the scope probes, twiddled with the knobs on the scope, right up until you closed SW1: at which time (T = 0 in the simulation) the scope is triggered and then the traces are captured during the following time of up to T = 10m or however long you have set the scope (simulation) to run for.

If you want to simulate what happens to this circuit if V1 = 0 for T < 0 and V1 = 1V from T = 0 onwards, then you have to build that into your models.

You cannot assume that a simulator starts from the same assumptions as you. If those assumptions, or initial conditions are important to you in you simulation, then you must build them in using whatever techniques the simulator allows.

CL does not allow the voltage across a capacitor (or the current through an inductor) to be specified as an initial condition the way you can in SPICE etc., but there are all sorts of other ways to do that in CL:

https://www.circuitlab.com/docs/faq/#q_set_initial_chargeflux

And search CL for "initial conditions".

BTW, it is confusing to talk about capacitors "loading":

" ... but without any doubt Cap1 has to be at load == zero, thus at 0V."

You can say that a capacitor is charged or discharged to a voltage.

You can say that a capacitor has a load of 10k Ohms in parallel with it or that it is loaded with a 1Meg resistor.

If you are talking about putting charge (as in C*V = I*t) into a capacitor or the voltage across a capacitor changing due to this charge than you have to talk about charge and not load.

In your circuit, although technically there are loads connected to your capacitors (R1 and R2), what you are actually studying is the change in voltage, V(C2) due to the charging of C2 from a voltage source in series with SW1 and R2.

Hence, your circuit / post should really be called "Charging a capacitor".

:)

@Signality:

OMG, thanks, sorry for the confusion with “load”, of course I mean “charging …” !!!

Regarding T=0:

This is not a philosophical application, so there is nothing before the “Big Bang”.

With my breadboard the BB is when I put on safety glasses, take a deep breath and flip the mains to “on”.

With simulation it would be the same, I’d fill in all required starting conditions (if there are any, marked by an asterisk … um, CL ? ) so the Solver would not have to make any assumption.

However, when I click “start” and the Solver accepts to start (thus it knows exactly what to do):

This is the BB. There is nothing before but silence.

The mystery voltage for infinite time before BB is unreasonable, not only with passive elements (some elements would have to be damaged even before the full circuit comes to life - I guess I know what you’ll answer here …) but also with most complex circuits which have an internal delay to set up.

The mystery voltage would also cause the whole circuit to “run” before the Solver starts, having unpredictable consequences together with the unknown particular moment when you start the solver.

And what about AC sources, why don’t they live “since ever” at the planes of La Mancha before the BB?

Did you try the obscure / undocumented “Skip Initial” with AC sources? Better then? :(

I’ll give another example to show that the “concept” of voltage before the BB is a dead end:

We want a 555 timer to start with delay to avoid the “power up / stray capacitance” pulse. The IC has an input “nReset” with an internal pull up (CMOS: about 100k), so we connect a small ceramic cap to ground to achieve some delay: It doesn’t work in simulation.

Ok, we add a bigger cap and start to think about why. But it doesn’t work in CL as we can see from this astable set up (look at the first part):

Investigation points to the fully charged C_Res at T=0 in simulation being the cause.

How come? And how come C_time isn’t? Because there are two resistors? Who would hold down the C_time? If there is power before T=0 the circuit would be running!

• This is a bug (a pesky one for the newbies, as you know from the forums).

Simply not realistic.

No need to complicate things more than they are ;-)

Regards, Sancho

“The wind's getting up, the snow is falling ...” - that’s a good example for the different views from different positions: Don_Q riding his horse, facing snow, poor Sancho on the ground - we have 25°C with bright sunshine, since weeks, no snow, no rain (but we’d need it so badly).

Well, it’s comfy to go with the masses. On the other hand, triumph isn’t to be found in the average. One (CL) should be aware of their limits and chances, however, I’d go for small and outstanding, no doubt.

BTW the documents here are … outstanding small, I agree.

As there are a lot of newbies visiting CL I’d vote for (and support) a small “What is it” and “How to start with CL” - project (if there isn’t any that I’ve missed?).

What do you think about?

Regards, Sancho