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See posted circuit. Adjusting R_Load cause current to change, but voltage also tracks. Even when current levels are within LM317 parameters.

You forgot to post the link ...

For the LM317 in your circuit,

Vout = Vref*(1 + R11/R2)

where Vref=1.25V.

With the values you have chosen, Vout=18.3V, which is above V3=17V.

Reduce R11 to reduce Vout and you'll see that the circuit regulates though it is not clear what output current the CL version of the LM317 (and LM137) supports since the load regulation seems poor for currents approaching 1A.

I also don't understand what the R_ADJ terminal resistance parameter is for ...

No it does not.

I have changed the values of R11 and R2 to 2.2k and 220 respectively. I deleted the op amp portion of the circuit in case something was getting confused.

While I get 12v out when R_Load is 50, as I adjust R_Load up and down to simulate changing load conditions, the output voltage changes along with the current feeding R_Load in the DC Solver.

I also don't know what the 50 ohm input impedance is for on the adjustment pin. I also don't know what you consider "close to 1 amp" since even at 50 ohms we're only 275ma or so.

I agree that load regulation is not as good as you'd expect for an LM317 but It does regulate.

Line regulation is good.

Load regulation is poor.

It is degraded by the R_O parameter being set too high.

But that can be fixed:

Working with my soldering iron ( - I got some old goodies to dismantle ;-) ) I came across a LM317 and remembered these comments regarding bad performance of the IC in CL.

With some test circuit and my “new” LM317 I gave it a try.

Now I think CL’s LM317 model for the voltage regulator is pretty good, just

• parameters have to be separated and some basics should be discussed.

As @Signality already pointed out, the “R_O” parameter seems to be to high. That’s correct for “normal” use.

It seems they took their value for R_O from measuring in a breadboard circuit.

Example: Assume R1 = 240, R2 = 2k4, so Vout is about 14 Volts.

From TI’s data sheet (figure 8) we take

Zout = Rs(1 + 2400/240).

So let’s assume the serial resistance Rs to 0.001 Ohm (terminal resistance + trace),

thus Zout would be 0.011 Ohm.

At smaller output voltage settings Zout would be even less.

But CL have set that value (R_O in CL) to 0.1 Ohm, regardless of the R2/R1 relation, that’s 9 times more than reasonable in our example, hence the output stability in the model is very poor (and even worse at lower voltage settings).

So the problem is that Zout depends on

• external resistors

• and “Rs”, which is part of the physical circuit / design

Thus it can not be part of the LM317 dataset (fixed default). On the other hand, there must be a changeable value in the model parameters.

Very similar is CL’s “R_ADJ” which is obviously the corresponding resistance for the ADJ - terminal. With 50 Ohms the value is incredibly high, I guess it’s a typo (should be 50 mOhm ? ). Also this value - if necessary at all - can not be part of the fixed dataset. It should be set to about 0.001 Ohm, but does not effect the circuit that much because of the very small and constant I_ADJ.

• Right now here is no such “flexible” parameter type available in any of CL’s elements, all are “chained” to the IC type.

This is a basic issue, as there must be a difference in “type” and “application” parameters. OK, the latter must have some reasonable preset values, but changing these values must not change the IC type.

I don’t know how this is done in other simulators. In CL there should be at least some document to explain parameters and how to use them.

To compare parameters and to check the LM317’s function I’ve made two test circuits , the first mentiones some points regarding R_O and overall design.

Regards, Sancho

@Sancho_P,

That's a good analysis.

Component and device models should never include the parasitics of the external circuit.

A component model in a circuit simulator should model that component, up to the end of it's package pins if necessary but no further.

Some devices are available in both bare die and packaged models. Packaged models include parasitics such as bond wire inductances and pad capacitances. It is up to the user to decide if they think such parasitics may have any significant effect on the simulation of their application.

Such parasitics are application dependent and have nothing directly to do with the component or device itself. They may affect how the model behaves but they are not part of the model. In RF circuits, they will definitely affect how the model behaves and must be included in the overall simulation circuit but that still doesn't mean they are part of the component or device model.

If the user wishes or needs to models the effects of external parasitics such as PCB trace resistance, inductance, track capacitance, trace to trace coupling or transmission line effects then these should be explicitly modelled either by discrete components or other simulation models if they are available.

See also:

https://www.circuitlab.com/forums/support/topic/538um7b6/lm317-lm137-parameters-clarification-please/

BTW: the effect of series output resistance is clearly documented for this type of three terminal regulator in the section on Load Regulation here:

http://www.ti.com/lit/ds/symlink/lm317hv.pdf

or:

http://www.farnell.com/datasheets/316192.pdf