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I built today an simple and traditional astable circuit with 2 transistors, 2 capacitors and 4 resistors. But it just can't oscillate in simulation! Anyone knows why.. Thanks!

Hi Steven, got same result. Can't get it to work in CL but breadboarding exact components work well. Also would like to know why CL can't model correctly.

Sorry, forgot to add my CL model but have made it public and called it Flip flop https://www.circuitlab.com/circuit/amsck2/flip-flop/

@steven7890,

The problem may be with the initial conditions.

In a simulator, unless you explicitly state otherwise in some way, devices with the same value or part number are identical.

In a real circuit they are not.

You need to introduce some slight difference or a kick of some sort to nudge the circuit out of it's initial, metastable state.

Have a search of CL for:

astable flip flop

to see some examples of how to do this.

See also:

https://www.circuitlab.com/circuit/b24363/ramped-and-glitched-signals-and-supplies-01/

@RobertHemingway,

You have solved the intial conditions or startup problem by introducing the time controlled switch, SW1.

The reason your circuit does not start is simply a typo:

R3.nB is not wired to C1.nB. The wire ends on a line in the symbol for C1 and not on a pin.

You may also find that increasing R1 and R4 from 22R to 220R makes the circuit work more as you would expect.

22R is asking too much collector current for the humble BC547B with a 100k base bias resistor and it is saturating.

Reducing R2 and R3 would have a similar effect but you may then allow Q1 & Q2 to sink excessive collector currents and/or dissipate too much power when on.

:)

many thanks signality, you're a legend.