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Ceramic capacitors should have a field added for their DC bias derating. The basic expression is Ceffective = Cnominal * EXP( -Vbias * K ). The new field would be for K. A typical value for this field might be something like 0.33, for example. The default is K=0, which is no derating. Neglecting the effects of ceramic capacitor DC bias derating is a large source off problems in circuits today. I don't see any simulators that have a good way to address this, but I haven't looked at all simulators.

I tied using the CL model, but after a few 100us, it crashes my simulation. I'm using it at the output of a switching regulator. Not sure if that matters or not. Anyway, when the simulation crashes, the voltage goes to kilovolts or negative kilovolts, and capacitance becomes near zero. It happens even if I put a small fixed capacitor in parallel. I'm using formula as Q = 22u * V() * EXP(-V()*0.33).

Have you checked out the examples I pointed you too.

As I said, it's not easy to make these models work properly. You need to understand a lot about what the model is doing. Even all the stuff about integrating the voltage/capacitance function does not always work reliably.

Are you sure your C vs V expression is valid?

Have you tried using the integral of this expression as shown in the varactor PDF paper?

The Varactor PDF was good. I integrated the function and it worked. It no longer crashes.

Q = 22u * (-1/0.33) * EXP(-V()*0.33)

This models a 22uF X5R Ceramic Capacitor in 0402 case size pretty closely for its DC Bias Derating. By 4V bias, this capacitor is just a few uF.

Simulation runs about 2x slower now. Was 6min for 1ms sim, but now 12min. I added two of these variable charge storage elements.

Your integrated expression for Q is now negative.

If you check the frequency (especially phase) response and time domain performance of your capacitor in something like a simple 1st order lowpass or highpass filter:

https://www.circuitlab.com/circuit/e278gk/comparing-nonlinear-capacitor-expressions-01/

you can see that the phase of the nonlinear capacitor with the non-integral form of the expression is leading. This is completely wrong for a real capacitor and is the reason that the time domain simulations explode.

The phase of the nonlinear capacitor with the integral form of the expression is leading, as in a real, linear capacitor.

:)

You might also like to read this:

http://www.knowlescapacitors.com/novacap/en/gn/technical-info/technical-brochure

in particular the sections about dielectrics and their behaviour.

:)

So this was complicated for me to figure out this expression and get it to work. Going back to my original post, for ceramic multilayer capacitors, they have very significant DC bias derating. So tons of engineers should be interested in a capacitor element that does this automatically in a simulator, and you just put in some sort of constant to adjust the amount of derating vs. voltage. It's a common problem and could be solved for us. Just my suggestion.