Forums » CircuitLab Feature Requests

The first to know would be if CL is interested in any form.

@Signality:

Ouch! ;-)

I’m not sure if I understood the full scope of your “personal opinion” (vision, concern, fear, …) - But written words often appear sharp as a blade, you know I’m ESL so I apologize if I got it wrong.

First you talk bout prioritizing feature requests.

• No need to do so because we can’t. Solely the author / developer has the say. In a team it would be mandatory to give feedback - but we are neither a team nor do we pay them.

However, I’m convinced that it is helpful when visitors (users) add their feedback as soon as possible, before they leave or get used to workarounds.

Personally I feel that there is no need for any feature request at this time because they don’t ask for.

Also there is the point with the bugs - here I’m with you, they come first. On the other hand, from my own experience I know that you can’t always fix them first. In this context it helps to haven an official list of bugs. I think it is mandatory. I know that even our customers appreciate to see (part of ;-) ) our bug lists.

• But bug listing (and feedback) is up to CL.

As I wrote above, regarding the rest of your “personal opinion” I’m not really sure but I fully agree if you mean:

Each day of touting CL for classroom use without having a serious agenda will deteriorate both, name and tool.

Now to the technical points of your feature request:

I think you’ve combined at least two points here (in your 2nd paragraph). Let me take them apart again because in my eyes both points are valid but should not be discussed together -

(- albeit they have something in common: the target):

A) User expectation (?who is the target?)

This is a very large and diffuse area. Published circuits show what the majority of CL’s visitors does and what probably would drag more attention to CL (if this is intended):

• A1) They want it simple.

• A2) A convenient editor (CL is pretty good).

• A3) Basic circuits and elements (like CL has).

• A4) Interactive, endless simulation with a front panel (CL is far [?] away).

• A5) Foolproof interface, “no” documentation needed (CL has neither nor).

B) Reasonable sanity check

This is mandatory when you look at the average visitor.

From my point of (dummy) view it is very simple. Kudos for your example, but I (and i guess most of the visitors) don’t even understand it.

Simple:

• B1) Each component has absolute limits depending on it’s type (see A3)

• B2) In “electronics” there are some common limits, too.

Reaching one of the limits triggers a warning form to pop up (“don’t show warnings”, Cancel / Proceed).

Exceeding double (4x ?) limit will stop the Solver and force the user to take action (e.g. adjust limits).

Back to your sophisticated example: Neither CL (online ! ) nor any other simulator will ever be perfect, let alone tell you “Dude, add 200 msec to your TDS and I’ll show you what will explode in reality”.

Thousands are working on “artificial intelligence” but it won’t help them to reach the “intelligence” of a housefly. Brain is Brain.

But it’s an epic fail which is obviously visible to any first class “student” probably on his first visit:

• To accept 2 kW on any basic component without warning.

• To compute xx kV in an circuit without warning.

• To drive current through an open switch.

• a.s.f (luckily the list isn’t too long).

This sanity check may depend on “Basic Electronics” (depending on toolbox / used parts) or switched off for “professional use” to increase speed or … “A "Rigorous" mode and a "Real World" mode.” or … whatever.

• Not a “SOA detector”.

• Not a “garbage in, sanity out” attempt.

Again: It depends on the target.

My personal opinion:

CL’s target (future) can not be to compete with the best commercial …

I’m afraid they are too silent to really have …

@Sancho_P,

That wasn't in any way meant to be a sharp posting. If it came over that way; my apologies.

When I talk about priorities and the authors being distracted etc., I'm trying to think from the point of view that the CL users don't have any direct influence on what they do. All we can do is ask and make suggestions or requests.

On the other hand I'm sure the people at CL do pay attention. I think they're just overwhelmed at the moment. So a well formulated request is more likely to get their attention than a scattered sprinkling of "what about this" and "hey could I have that".

As I said, I'd like something that helped the user, especially the new and - in both electronics and simulator space - inexperienced user but you have to be very careful that you actually don't end up with something that is just as confusing, just in a different sense.

Briefly on your points ...

B1) w.r.t. (A3) that could rapidly get to be a very large dataset.

B2) You'd have to define what those limits are up front. Which takes you away from another of your goals of reducing the documentation.

For instance a few years ago I designed and simulated a 12V to 15kV inverter. So what limits would you put on which components there? And how do you let the user assign them.

My basic concern is that there are other things that CL needs to address - and could derail the whole thing if they don't - before something as murky as we're discussing. Whether it's sanity checking, illuminated LEDs, stupid powers blowing up a resistor or the whole SOA type of simulation is only a matter of degree.

The solvers in CL have improved in many respects since they started but today I found that my LM334 simulation that took 45 minutes to run when I first posted it now ran for an hour and was reporting a remaining time of over 10 hours.

(I found another later on today but I can't remember what it was now.)

That's the sort of thing that needs to be fixed before anything else gets much of a look in.

So if there's a big ask then it needs to be a very clear, well defined and specified ask.

Oh, I wouldn't be too sure about AI.

By coincidence there's a bit of a discussion about this on the LinkedIn SPICE group. I just posted something there about:

http://www.humanbrainproject.eu/

and

http://www.newscientist.com/article/mg21628925.100-brainlike-chip-outstrips-normal-computers.html

I've also just finished reading Zendegi by Greg Egan.

Hmmm, I would be so sure ...

:)

On the contrary! Between your lines I felt you terrified by such blasphemy against CL and spice ;-)

I think I understand your concern regarding “derail the whole thing”.

But are there any rails? And if:

The very basic question, which has to be answered day by day, would be:

Is our target still at the end of the rails?

CL has the say.

@Signality:

Your SOA - example was interesting but at first I thought it was much too sophisticated for a basic discussion - my bad.

However, as I’m always interested and do not have experience with FET's I wanted to dig in, understand, and “check for sanity”.

In detail now it turns out to be quite easy, because the 2N7000 / 2N7002 in any case, regardless of the PWM, was a bad choice (but I think this was intended ...).

On the other hand there are pulses in the CL simulation which would have to trigger even more serious warnings and a shut down but:

• I do not understand them. I want to know how you (or the solver) are making them ;-)

OK, now I’m “Sancho the Sanity - Checker”:

To speed up simulation I’ve reduced stop time to 600usec, that’s enough to show all my points:

a) @4us the PWM is “on”, we have 296mA @M1 ---> current warning level 2N7000 would be 200mA + 10% regardless of time duration so “M1 current Warning! Do you want to proceed?” would stop the solver the first time. The 10% would be a general (adjustable) parameter for all component limits here to make a reasonable hysteresis.

b) @4us the supply voltage isn’t fully settled, I’d not expect that current reading to be true, hey solver, is this reading correct???

c) @4us also power dissipation @M1 is above limit of 400mW, but for the power the first computation will trigger an internal flag only.

d) @6us current through M is (still) too high (warning was acknowledged) but now at the second consecutive computation Pd is more than 400mW ---> “M1 power Warning! Do you want to proceed?”.

OK, at any time you could disable all component limit checking, e.g. to increase solver speed.

But let’s proceed further with component limt check ON.

e) Later @116us we are below (M1) power limits, the second consecutive computation will clear the warning flag, but current warning will remain ON.

f) @296us we are back at d), power dissipation warning ON.

At this point It should be clear that one can’t sell that circuit “as is”. Even using a slightly more powerful version the TO-92 / SOT-23 is the limit.

But now it comes to my real concern:

What happens at 376us ? Is it true?

g) @375.8us the solver reports Vgs to 165V ---> way above a first warning level (22V). Now one could discuss if there should be an extra parameter but I’d assume twice the warning (==220% Vgs max) would suffice and should stop the solver because of “component failure”.

To proceed wouldn’t make much sense because no one could tell exactly how the component will fail in each case. One would have to increase the parameter or shut off component limit check and resume simulation.

• Assume we now have switched components limits to OFF: The solver can resume and would proceed happily with kV and kA in the used components.

h) @376u the solver computes -1.441kV (Vgs) and 3.32A. Both, the high voltage and high current won’t trigger the (B1) warning and double limit warning now.

• But even with component limit check off there must be a “High Voltage warning M1/Q2/R2! Do you want to proceed?” from what I wrote in B2) as “common limits in electronics”.

Just my “feeling”: When using electronic components (toolbox) there should be a simple warning level set to 50 Volts and to 5 Amps to trigger the warning on any result in solver. The voltage because beyond that it is life threatening and the current because it is unusual for breadboards / PCB’s and therefore it should be noticed. It does not hurt to acknowledge “Yep, proceed”.

Of course these common limits would be adjustable parameters for each circuit but the default would be set to 50 / 5 using elements from the electronic toolbox (I think about a “mechanical” toolbox later???). You could also disable the “common limits” anyway.

All the limits according B1 and B2 have to be checked in the solver, even if the data point is not to be displayed in any graph. That means, Vgs would have been to check against limits even in your original circuit. The value is computed anyway, the limit check is very little effort compared to the other computations.

Again, my biggest concern is that I do not understand those peak values. And I do not understand what difficulty you meant exactly in “Detecting SOA violations”, is there more to be considered with FETs?

[ Sorry, I have Googled, but seems I was “derailed” after watching a couple of minutes, however, I had a refreshing nap, thanks ;-) ]

Regards, Sancho

About the unrealistic spikes you are seeing in Vgs:

https://www.circuitlab.com/docs/faq/#q_unrealistic_spikes

" ... because the 2N7000 / 2N7002 in any case, regardless of the PWM, was a bad choice (but I think this was intended ...)."

The example deliberately sets up a situation where the SOA for the 2N7002 is violated under some duty cycles and not others.

" ... I do not understand what difficulty you meant exactly in “Detecting SOA violations”, is there more to be considered with FETs?"

The SOA for MOSFETS is arguably more complex than for bipolar devices and is particularly well described in the datasheet graphs for the 2N7000 family of devices so was a good choice from the devices available in CL.

The allowed limits on Id and device power dissipation are pulse width dependent so a current or power dissipation may be allowed up to some pulse duration after which it may exceed the reduced limits that apply for longer pulse durations.

That's what the boundaries on the SOA graphs are indicating.

This time dependency is why the SOA checking needs to take into account the length of time that a device current or power has been at some level before flagging up a problem. It may not be a problem for the first Xus but is after that.

That's what the reference to integration is about.

A thought ... if you are Sancho_P, does that make me Don_Q for tilting at windmills in CL space?

:)

Well, as mentioned before, I think there is no need for another copycat attempt of a high end but dicey universal electronics simulator with endless components and complexity.

Have a look at https://www.circuitlab.com/browse/all/ to see what the average visitor does. Many don’t even use the simulator.

But for most of the others the simple sanity check (max limits) would be a highlight, a useful feature to avoid crazy results and dangerous breadboard experiments.

However, as the solver happily produces spikes it’s the wrong time to discuss such simple things:

• This is clearly the time for artificial intelligence!

What about some AI to help the solver find sudden spikes and jumps in dI/dt which the average housefly could already see? (*)

Yeah, I imagine modern Don_Q riding on AI against spikes in CL’s VR - world, while Sancho collects solar energy (… or begs for gasoline) so they can refuel during night.

;-)))

(*) Oh sorry, I forgot, that may be the same in spice, thus it’s pretty acceptable, isn’t it?

"*) Oh sorry, I forgot, that may be the same in spice, thus it’s pretty acceptable, isn’t it?"

Aaaah, Sancho_P: forgive me; I did not realise that you held such high office in Spain: Chief Satirist to the Royal Court eh?

: )

Not acceptable but, sadly, state of the art.

All simulators I've tried do it to some extent. Gnucap is probably the least likely to ever fall into that trap but I just don't get on with the UI for plotting etc.

http://www.johannes-bauer.com/electronics/gnucap/?menuid=2

The winds of La Mancha are picking up. I must away to joust amongst dappled shadows fleeing before the flailing sails .....

p.s. One of the most ironic things I have ever seen: in the middle of La Mancha, a huge, defunct, wind turbine designed but abandoned whilst being tested for offshore use.

The company responsible? Now who could that have been so many miles from the coast? Oh, I remember: Enron!!

The second paragraph of:

http://www.new-wave-concepts.com/pr/livewire.html

should encourage all Virtual Realists.

:)