Browser compatibility warning: CircuitLab may not work as expected in your web browser. Please see our System Requirements.

Tremolo 02 PUBLIC

Created by
Created September 02, 2013
Last modified September 02, 2013
Tags No tags.

Summary

Simple Tremolo circuit using an N channel JFET as a voltage controlled resistor.

Link & Share

Copy and paste the appropriate tags to share.

Schematic PNGs: (download or hot-link)
small, medium, large

Circuit URL (e-mail, IM, blog, etc.):
  

CircuitLab forums and comments:

BBCode (many online discussion forums):

Markdown:

HTML:

Open in editor


Description

Simple Tremolo circuit using an N channel JFET as a voltage controlled resistor.

A reduced signal distortion and larger gain swing version of:

https://www.circuitlab.com/circuit/a78uqj/tremolo/

Split gate bias resistors reduces signal distortion:

http://www.vishay.com/docs/70598/70598.pdf

https://www.circuitlab.com/circuit/y86grn/voltage-controlled-attenuators-using-jfets-01/

Note that gate bias voltage is with respect to vcc.

See also:

https://www.circuitlab.com/circuit/a6hr4e/tremolo-03/

https://www.circuitlab.com/circuit/dn9sbn/tremolo-04/

Simulate > Time Domain > Run Time-Domain Simulation

http://signality.co.uk

Comments

No comments yet. Be the first!

Leave a Comment

Please sign in or create an account to comment.

Revision History

Only the circuit's creator can access stored revision history.

Home
My Workbench
Documentation / FAQ
Membership
Electronics Textbook
Electronics Q&A
Forums
Blog
About Us
Contact Us
Terms of Service
Privacy Policy