Now showing circuits 1-18 of 18. Sort by
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joule thief 01 PUBLICJoule Thief circuit. CL have changed something in the simulator because this used to run with the sim set up as. Now, it does not show the exponential rise of V1 and does not start oscillating unless... by signality | updated July 01, 2014 |
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opamp DC gotchas PUBLICWHATEVER THE BUG WAS IN CL THAT CAUSED THIS PROBLEM: IT NOW SEEMS TO HAVE BEEN FIXED (140202). Beware convergence errors in CL opamp circuits! by signality | updated February 02, 2014 initial-conditions opamp ramped-supplies sigtorial startup tutorial |
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lossless_line_03 PUBLICA simple lossless transmission line. In practice many more LC segments (100+) are needed for a realistic simulation. This one has a slightly modified 1st stage of the line. It converges. by signality | updated June 19, 2013 convergence initial-conditions lossless-line startup transmission-line |
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lossless_line_02 PUBLICA simple lossless transmission line. In practice many more LC segments (100+) are needed for a realistic simulation. This version converges. by signality | updated June 19, 2013 convergence initial-conditions lossless-line startup transmission-line |
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lossless_line_01 PUBLICA simple lossless transmission line. In practice many more LC segments (100+) are needed for a realistic simulation. by signality | updated June 19, 2013 convergence initial-conditions lossless-line startup transmission-line |
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Dimfougne VCO fixed PUBLICby signality | updated May 28, 2013 |
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MOSFET Royer-like oscillator 01 PUBLICV1 (vcc) has exponential ramped startup to kick-start oscillation. XFRMR1 forms a centre tapped inductor However, CL takes a long time to run the simulation. Simulate > Time Domain > Run Time-Domain... by signality | updated March 01, 2013 initial-conditions oscillator oscillator-startup royer startup time-step |
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astable flip flop classical 01 PUBLICby signality | updated February 13, 2013 |
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Ramped and glitched signals and supplies 01 PUBLICWays to ramp up and put glitches in signals and supplies. Simulate > Time Domain > Run Time-Domain Simulation See also: [circuitlab]hsss64[/circuitlab] by signality | updated November 01, 2012 |
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relaxation osc fixed 01 PUBLICAn opamp based squarewave relaxation oscillator. by signality | updated June 11, 2012 choosing-time-step convergence convergence-problem opamp relaxation-oscillator startup |
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Geophone Amplifier PUBLICSingle-supply voltage. High-impedance differential input referenced to ground. Low impedance differential line-driver output. This circuit would not converge with old JFET model. CircuitLab fixed the... by anubi | updated May 19, 2012 |
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Trouble2 PUBLICThis is a subset of "Trouble 1". This is the core voltage gain and DC bias feedback which would exhibit convergence difficulty on the old FET model. CircuitLab has fixed the model. This circuit now... by anubi | updated May 18, 2012 amplifier bjt convergence feedback initial-conditions jfet level-shift startup |
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astable flip flop 02 PUBLICThe classic 2 transistor astable multivibrator with and without anti-saturation clamps. by signality | updated April 23, 2012 |
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davidkengs current source v1 fixed 01 PUBLICby signality | updated April 19, 2012 |
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Trouble2-fixed_01 PUBLICby signality | updated April 18, 2012 |
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Trouble2-fixed_02 PUBLICby signality | updated April 18, 2012 |
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relaxation osc fixed 02 PUBLICSometimes you have to kick an oscillator out of an initial, metastable state so that it starts reliably at a user defined time in the simulation. This shows a way to do that. by signality | updated April 10, 2012 |
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relaxation osc fixed 03 PUBLICSometimes you have to kick an oscillator out of an initial, metastable state so that it starts reliably at a user defined time in the simulation. This shows a way to do that. by signality | updated April 10, 2012 |
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